Part 2_ FPGA Implementation of Automatic Dependent Surveillance–Broadcast Using Matlab Simulink

This example shows how to design packet-based airplane tracking application based on Automatic Dependent Surveillance Broadcast (ADS-B) standard, partitioned between FPGA and embedded processor.

Contents Introduction - Automatic Dependent Surveillance–Broadcast Introduction - SoC Blockset Introduction - Packet-Based ADS-B Transceiver ADS-B Transmitter Algorithm ADS-B Receiver Algorithm Matlab Simulink implementaion Simulation & Results Supported Hardware Platforms: Xilinx® Zynq® ZC706 evaluation kit + Analog Devices® FMCOMMS2/3/4 card. ZedBoard™ + Analog Devices FMCOMMS2/3/4 card. Automatic Dependent Surveillance–Broadcast (ADS–B) is a surveillance technology in which an aircraft determines its position via satellite navigation or other sensors and periodically broadcasts it, enabling it to be tracked.

ADS-B, which consists of two different services, "ADS-B Out" and "ADS-B In", could replace radar as the primary surveillance method for controlling aircraft worldwide.

ADS-B provides many benefits to both pilots and air traffic control that improve both the safety and efficiency of flight.

Traffic : When using an ADS-B In system, a pilot is able to view traffic information about surrounding aircraft if those aircraft are equipped with ADS-B out. This information includes altitude, heading, speed, and distance to aircraft.

Weather : Aircraft equipped with universal access transceiver (UAT) ADS-B In technology will be able to receive weather reports, and weather radar through flight information service-broadcast (FIS-B).

Flight information: Flight information service-broadcast (FIS-B) also transmits readable flight information such as temporary flight restrictions (TFRs) and NOTAMs to aircraft equipped with UAT. This example showed how SoC Blockset is used to design packet-based ADS-B standard to meet system requirements.

By simulating the design with memory channel as interface between the FPGA and the Processor, we validated that the system requirements of throughput and drop packets are met at the design time.

We implemented the design on SoC device from the model and verified the results on hardware. Although ADS-B is not a computationally intensive standard, it is useful to demonstrate the design process for packet-based systems intended for implementation on a SoC device.

We can follow the same design procedure for even more computationally intensive requirements for this application or another packet-based application. Click here to download the simulink model https://drive.google.com/file/d/1JHyIIEEn64gE2ljG1UOu9aMgkdE56xra/view?usp=sharing https://drive.google.com/file/d/16ODZH3JI3z7Jfe-jomOSWsKYqoyyICLO/view?usp=sharing Kindly Subscribe My YouTube Channel... Please like, share and comments on My Videos 🙏 Please click the below links to Subscribe/Join & View my Videos https: //www.youtube.com/c/DrMSivakumar Telegram : t.me/Dr_MSivakumar website : drmsivakumar78.blogspot.com

Part 1_ Design & FPGA Implementation of Automatic Dependent Surveillance–Broadcast Using Matlab

This example shows how to design packet-based airplane tracking application based on Automatic Dependent Surveillance Broadcast (ADS-B) standard, partitioned between FPGA and embedded processor.

Contents Introduction - Automatic Dependent Surveillance–Broadcast Introduction - SoC Blockset Introduction - Packet-Based ADS-B Transceiver ADS-B Transmitter Algorithm ADS-B Receiver Algorithm Matlab Simulink implementaion Simulation & Results Supported Hardware Platforms: Xilinx® Zynq® ZC706 evaluation kit + Analog Devices® FMCOMMS2/3/4 card. ZedBoard™ + Analog Devices FMCOMMS2/3/4 card. Automatic Dependent Surveillance–Broadcast (ADS–B) is a surveillance technology in which an aircraft determines its position via satellite navigation or other sensors and periodically broadcasts it, enabling it to be tracked.

ADS-B, which consists of two different services, "ADS-B Out" and "ADS-B In", could replace radar as the primary surveillance method for controlling aircraft worldwide.

ADS-B provides many benefits to both pilots and air traffic control that improve both the safety and efficiency of flight.

Traffic : When using an ADS-B In system, a pilot is able to view traffic information about surrounding aircraft if those aircraft are equipped with ADS-B out. This information includes altitude, heading, speed, and distance to aircraft.

Weather : Aircraft equipped with universal access transceiver (UAT) ADS-B In technology will be able to receive weather reports, and weather radar through flight information service-broadcast (FIS-B).

Flight information: Flight information service-broadcast (FIS-B) also transmits readable flight information such as temporary flight restrictions (TFRs) and NOTAMs to aircraft equipped with UAT. This example showed how SoC Blockset is used to design packet-based ADS-B standard to meet system requirements.

By simulating the design with memory channel as interface between the FPGA and the Processor, we validated that the system requirements of throughput and drop packets are met at the design time.

We implemented the design on SoC device from the model and verified the results on hardware. Although ADS-B is not a computationally intensive standard, it is useful to demonstrate the design process for packet-based systems intended for implementation on a SoC device.

We can follow the same design procedure for even more computationally intensive requirements for this application or another packet-based application. Click here to download the simulink model https://drive.google.com/file/d/1JHyIIEEn64gE2ljG1UOu9aMgkdE56xra/view?usp=sharing https://drive.google.com/file/d/16ODZH3JI3z7Jfe-jomOSWsKYqoyyICLO/view?usp=sharing

FPGA HDL Implementation of Contrast Limited Adaptive Histogram Equalization (CLAHE)U sing Simulink

This example shows how to implement a contrast-limited adaptive histogram equalization (CLAHE) algorithm using Simulink® blocks. This is an image contrast enhancement algorithm that overcomes limitations in standard histogram equalization (HE). %CLAHE Algorithm modelname = 'CLAHEExample'; open_system(modelname,'force'); set_param(modelname,'SampleTimeColors','off'); set_param(modelname,'Open','on'); set_param(modelname,'SimulationCommand','Update'); set(allchild(0),'Visible','off'); %Tile Generation system = 'CLAHEExample/CLAHEHDLAlgorithm/tileGeneration'; open_system(system,'force'); %Histogram Equalization Pipeline system = 'CLAHEExample/CLAHEHDLAlgorithm/histoEqPipeline/'; subsystem = [system 'histPipe1']; open_system(subsystem,'force'); %The remaining total excess value is passed to the Redistribute subsystem as excess value. system = 'CLAHEExample/CLAHEHDLAlgorithm/histoEqPipeline/'; subsystem = [system 'histPipe1/redistribute']; open_system(subsystem,'force'); %The bilinear interpolation equation to compute a pixel value in the output image. system = 'CLAHEExample/CLAHEHDLAlgorithm/bilinearInterpolation'; open_system(system,'force'); Simulink Model : Contrast – Limited Adaptive Histogram Equalization  The input image frame is converted to a pixel stream and pixelcontrol bus using a Frame To Pixels block.  The adjusted pixel values are given to the Pixels To Frame block and converted to a frame using the control signals.  The pixel value read from the imgBuffer subsystem is passed to CLAHEHDLAlgorithm for adjustment.  The pixel stream is passed to the CLAHEHDLAlgorithm subsystem for contrast enhancement and is also stored in the imgBuffer subsystem.  While processing, the CLAHEHDLAlgorithm subsystem generates the address to read image data from the imgBuffer subsystem. The Result subsystem shows the input image and output image once all the pixels in the frame have been received by the Pixels To Frame block. Click here to download the simulink file: https://drive.google.com/file/d/1ktc0B7Ov0P9XMGCs-eTIGjWNvfuOK3ZI/view?usp=sharing

FPGA Implementation of Low-Light Enhancement Algorithm_ To Enhance Low-Light Images/Videos Matlab

This example performs LLE by inverting an input image and then applying a de-haze algorithm on the inverted image.

After inverting the low-light image, the pixels representing non-sky region have low intensities in at least one color channel.

The algorithm consists of six stages. Step 1: Scaling & Inversion The input image   is converted to range [0,1] by dividing by 255 and then inverting pixel-wise. Step 2: Dark Channel Estimation The dark channel is estimated by finding the pixel-wise minimum across all three channels of the inverted image. Step 3: Refinement The airlight image from the previous stage is refined by iterative smoothing. This stage consists of five filter iterations with a 3-by-3 kernel for each stage. Step 4: Non-Linear Correction To reduce over-enhancement, the refined image is corrected using a non-linear correction. Step 5: Restoration Restoration is performed pixel-wise across the three channels of the inverted and corrected image. Step 6: Inversion To obtain the final enhanced image, this stage inverts the output of the restoration stage, and scales to the range [0,255].

The figure shows the input image and the enhanced output images obtained from the LLESimplified subsystem and the LLEHDL subsystem. Click here to get the simulink file: https://drive.google.com/file/d/1nBBRRzjqXsKmImOCqdXWTZ8NXM6hmi3m/view?usp=sharing

Implementation of Haze Removal Algorithm to Enhance Low-Light Images Using Matlab

This example shows how to enhance low-light images using an algorithm suitable for FPGAs.

Haze removal or image dehazing is required in real-world weather conditions to obtain a fast and high-quality hazy free image which is used in various fields like satellite systems and aircraft systems.

Some of the wide important areas in which the haze removal methods used are air- crafts, remote sensing, intelligent transportation systems, underwater image processing, Object detection, outdoor surveillance, railway systems, aerial imagery, computational photography/vision applications, video analysis and recognition, image classification, military and defense surveillance system, etc. Example Code: % Import an RGB image captured in low light. A = imread('lowlight_21.jpg'); % Invert the image. AInv = imcomplement(A); % Apply the dehazing algorithm. BInv = imreducehaze(AInv,'ContrastEnhancement','none'); % Invert the results. B = imcomplement(BInv); %Display the original image and the enhanced images, side-by-side. montage({A,B}); click here to download the Matlab Livescript file: https://drive.google.com/file/d/1S8iBE42W0akwTQp2BksTsSd-NRb5MvV5/view?usp=sharing

Design & Implementation of Delta Robot for Pick-and-Place Operations Using Simulink

This example shows how to model a delta robot performing a pick and place task.

Contents

Introduction – Delta Robot Model Matlab KinematicsSolver object Simulink Model Delta Robot Subsystem Planning and Control Subsystem: Forward and Inverse Kinematics Planning and Control Subsystem: Path Planner Planning and Control Subsystem: Controller Simulation Results from Scopes The robot picks up a part using a vacuum gripper, moves the part to each of the four markers on the table, drops the part at the first marker, and then returns to the home position.

These forward and inverse kinematics computations are done using KinematicsSolver objects.

The Planning and Control/Controller subsystem contains a simple PID controller that drives the actual positions and velocities of the actuators to their desired values. The objects are defined as persistent variables in the functions sm_pick_and_place_robot_fk and sm_pick_and_place_robot_ik. These functions are called by the MATLAB function blocks Planning and Control/Forward Kinematics and Planning and Control/Inverse Kinematics 

Modeling and Simulation of a Piezoelectric Vibration Energy Harvester Using Matlab Simulink

This example shows how to model a device that harvests energy from a vibrating object by using a piezo bender.

This example shows how to model a device that harvests energy from a vibrating object by using a piezo bender.

The device uses this energy to charge a battery and power a load.

These devices are common in low-power applications that require energy autonomy, such as wearable devices or sensors in vehicles.

This energy harvester consists of a piezo bender, a rectifier, and a DC-DC converter. The left end of the piezo bender is clamped to a vibrating object, forcing the motion.

The right end of the piezo bender is connected to an extra mass.

Due to the elasticity, mass, and inertia of the piezo bender, the motion of the right end is not synchronous to the left end.

The deformations produce then a charge and voltage across the electrical terminals of the piezo bender, that are harvested into power.

The full-wave rectifier transforms the AC power generated by the piezo bender into DC power. It comprises four diodes and a capacitor that acts as a filter to smooth the DC voltage.

The buck converter regulates the voltage to transfer the maximum possible power to the load and ensures that the transfer of power is unidirectional.

In this example a pulse generator controls the converter in open-loop with a fixed switching frequency and duty cycle.

If the vibration source does not have a constant frequency or it contains harmonics, you can design a more sophisticated closed-loop controller to optimize the transfer of power and improve the efficiency of the energy harvester in different conditions. Initially, the energy harvester charges a battery.

Then both the energy harvester and the battery power up a constant power load.

Simulation & Analysis of Grid Connected Photo Voltaic Residential System with MPPT Controller

This example shows the operation of a photovoltaic (PV) residential system connected to the electrical grid.

Run the simulation and observe the resulting signals on the various scopes. 1) At 0.25s, with a solar irradiance of 1000 W/m2 on all PV modules, steady state is reached. The solar system generates 2400 Watts and the DC link is maintained at 400 volts with a small 120-Hz ripple due to the single-phase power extracted from the PV string. The Utility meter indicates that the system takes almost no power from the grid to supply the home total load. 2) At 0.3s, a partial shading condition is created by reducing the irradiance on some PV modules. When steady-state is reached at 0.35s, the MPPT controller has set the boost duty cycle at 0.44, generating a PV string voltage of 225 V. With this voltage, 920 W is extracted from the PV string. As you can see on the PV curve characteristic, the system is operating at a local maximum power point but not at the global maximum power point. 3) At 0.4s, a duty cycle scan of 0.25 seconds is performed by the MPPT controller to find the GMPP point. 4) At 0.7s, the MPPT controller has set the boost duty cycle at 0.58 generating a PV string voltage of 168 V. With this voltage, 1364 W is extracted from the PV string which is the GMPP value. The Utility meter indicates that it takes now around 1100 W (2500 W residential load - 1364 W supplied by PV) from the grid to supply the home total load.